Recently, to promote energy saving in electronic devices, switching regulators with improved efficiency have been used. However, switching regulators produce switching noise when the switching device in the switching regulator is turned ON and OFF, and the switching noise is produced not only at the switching frequency but also at the harmonic frequencies which are integral multiples of the switching frequency. Because of this feature, when a switching regulator and a radio transmitting and receiving circuit are integrated into the same semiconductor device, there may arise a problem that the switching noise from the switching regulator exerts harmful effect on the frequencies used in the radio transmitting and receiving circuit.
FIGS. 6 through 8 show exemplary configurations of a clock signal generation circuit configured to drive a switching transistor in conventional DC-DC converters (see, for example, Patent Documents 1 and 2)
First, the operation of the configuration shown in FIG. 6 is described.
As shown in FIG. 6, a resonator 156 is connected to a reference oscillation circuit 155. The reference oscillation circuit 155 generates an oscillation signal FT having a constant frequency based on the resonator 156. A divider 157 divides the oscillation signal FT to generate a signal CC and outputs the signal CC to a phase comparator 158. The phase comparator 158 compares the phase of the signal CC with the phase of a division signal CD output from a dividing section 164 and generates a frequency error signal EFC. The frequency error signal EFC is supplied to the base of an NPN transistor 160 through a low pass filter 159.
An oscillation section 161 includes a CR oscillation circuit and outputs an oscillation signal Fs. The frequency of the oscillation signal Fs is determined by a resistor 162 and a capacitor 163. The NPN transistor 160 is connected in parallel to the resistor 162. Therefore, the resistance value of the resistor 162 changes in accordance with the operation of the NPN transistor 160, thereby enabling changing the frequency of the oscillation signal Fs. The oscillation signal Fs is supplied to the dividing section 164 and a DC-DC control circuit (not shown) configured to control the operation of the switching transistor of the DC-DC converter. The dividing section 164 divides the oscillation signal Fs by a predetermined division ratio which is set by a division control signal BC output from a micro-computer (not shown) for selecting a station, the micro-computer being included in a tuner section (not shown) used for receiving radio broadcast signals.
For example, the divider 157 divides the oscillation signal FT and generates a signal having a frequency of 5 kHz. Further, the dividing section 164 divides the oscillation signal Fs to generate and output the division signal CD having a frequency one-twentieth ( 1/20) of that of the oscillation signal Fs. The phase comparator 158 compares the phase of the signal CC with the phase of a division signal CD, and generates the frequency error signal EFC so that the frequency of the signal CC becomes equal to the frequency of the division signal CD. The phase comparator 158 supplies the generated frequency error signal EFC to the NPN transistor 160. As a result, the frequency of the oscillation signal Fs generated by the oscillation section 161 becomes 100 kHz. In the DC-DC control circuit (not shown), the switching transistor switches based on the oscillation signal Fs. Therefore, noise having a fundamental frequency of 100 kHz and its harmonic frequencies which are the integral multiples of 100 kHz is generated.
Next, when a broadcast wave having a frequency of, for example, 999 kHz is received by operating a tuner section, the division ratio of the dividing section 164 is set to 21 by the division control signal BC. By setting this way, the frequency of the oscillation signal Fs is divided by 21 to generate the division signal CD having a frequency of about 4.76 kHz. As described, the phase comparator 158 generates and outputs the frequency error signal EFC to increase the frequency of the oscillation signal Fs so that the frequency of the division signal CD becomes 5 kHz. Namely, the frequency of the oscillation signal Fs increases up to 105 kHz so that the division signal CD having a frequency of 5 kHz is obtained under the condition of the division ratio of 21 (divided by 21). As a result, the switching transistor (not shown) is driven based on the oscillation signal Fs having a frequency of 105 kHz, and the frequency of the switching noise becomes different from the frequencies of the receiving range of the broadcast wave and the intermediate frequency signal, thereby enabling avoiding poor reception status.
Next, the operation of the configuration shown in FIG. 7 is described.
As shown in FIG. 7, a reference signal CB having a predetermined frequency generated by a tuner section (not shown) and a division signal CD output from the dividing section 164 are input to a phase comparator 165. The phase comparator 165 compares the phase of the reference signal CB with the phase of a division signal CD, and generates and supplies the frequency error signal EFE to the base of the NPN transistor 160 through the low pass filter 159. When the division ratio of the dividing section 164 is set to 12 and the frequency between broadcast stations is 9 kHz, this 9 kHz is set as the frequency of the reference signal CB and the reference signal CB having a frequency of 9 kHz is input to the phase comparator 165.
The phase comparator 165 generates a frequency error signal (EFE) so that the frequency of the reference signal CB is equal to that of the division signal CD. As a result, the frequency of the oscillation signal Fs generated by the oscillation section 161 becomes 108 kHz. Under this condition, if a broadcast wave having a frequency of 1080 kHz is to be received, since this frequency (1080 kHz) is equal to the frequency of one of the harmonic components of the switching noise of the oscillation signal Fs, namely ten times the frequency (108 kHz) of the oscillation signal Fs, the reception status is affected by the switching noise. To avoid the problem, the division ratio of the dividing section 164 is changed to 13 using the division control signal BC. By setting this way, the frequency of the oscillation signal Fs is changed to 117 kHz and therefore, the frequencies of the harmonic components of the switching noise are out of the reception range of the broadcast wave, thereby avoiding the occurrence of poor reception.
Next, the operation of the configuration shown in FIG. 8 is described.
As shown in FIG. 8, a resonator 167 is connected to a oscillation circuit 166. The oscillation circuit 166 generates an oscillation signal Fu having a constant frequency based on the resonator 167 and outputs the generated oscillation signal Fu to a dividing section 168. The dividing section 168 divides the oscillation signal Fu and generates and outputs an oscillation signal Fs. The oscillation signal Fs is supplied to the DC-DC control circuit (not shown) and used to drive the switching transistor.
Further, a division control section 169 is connected to the dividing section 168, and generates a division control signal BD to continually or intermittently switch the division ratio of the dividing section 168 at a predetermined time period.
Therefore, the division ratio of the dividing section 168 is continually or intermittently switched by the division control signal BD at the predetermined time period. As a result, the frequency of the oscillation signal Fs is accordingly switched at the predetermined time period.
As described above, the frequency of the oscillation signal Fs serving as a the switching signal is continually or intermittently changed. As a result, the fundamental frequency component and the harmonic frequency components of the generated noise are dispersed. Therefore, noise amount at a predetermined frequency per unit time can be reduced, thereby reducing the level of the generated noise to an acceptable level in practical use.    Patent Document 1: Japanese Patent Application Publication No.: H9-266425    Patent Document 2: Japanese Patent Application Publication No.: H9-266426